The present invention relates to a semiconductor device and a method for manufacturing the same and, more specifically, to a semiconductor device having a single-sided resin-sealed package structure.
The present invention is applied to a semiconductor device having a multiple terminal of not less than 100 pins operated at a high frequency of a gigahertz band.
There is much demand for miniaturizing and thinning a package in a semiconductor device used in an IC card, a mask ROM card for games, a portable telephone, etc. To meet the demand, the technique of mounting a bare semiconductor chip (bare chip) has been developed, and chip-on-board (COB) mounting, flip-chip mounting, etc. are known.
In the flip-chip mounting, a metal bump electrode on an element forming face of the bare chip is pressed on and connected to an electrode pad formed on a chip mounting face on a wiring substrate (flip-chip bonding). Although flip-chip mounting is superior in mounting density to the COB mounting requiring wire bonding, it has a problem that stress due to thermal expansion of the substrate is applied to a connecting portion of the substrate and chip thereby to degrade the reliability of the connection.
As an example of an improvement of the flip-chip mounting, a single-sided resin-sealed package structure is known in which a substrate and a bare chip are mechanically fixed to each other by interposing resin between the substrate and chip.
FIG. 1 is a plan view illustrating the upper face of a prior art semiconductor device having a single-sided resin-sealed package structure. FIG. 2 is a plan view showing the lower face of the semiconductor device of FIG. 1. FIG. 3 is a cross-sectional view taken along line 3--3 of FIG. 2.
The package structure illustrated in FIGS. 1 to 3 includes a two-layered wiring substrate 11 having a connected portion and a wiring pattern 13 on the major face thereof, a semiconductor chip 10 mounted face down on a chip mounting face of the substrate 11 with a metal bump electrode 12 interposed therebetween, a resin-sealed layer 16 formed between the chip 10 and substrate 11, and an externally connecting terminal 15 guided and exposed to a no-chip mounting face of the substrate 11 and electrically connected to the chip 10.
As shown in FIG. 3, the externally connecting terminal 15 is shaped like a bump vertically on the undersurface of the substrate 11, and connected to the wiring pattern 13 via a through-hole wiring 14. Otherwise, as shown in FIG. 4, the terminal 15 is formed as a wiring pattern 152 on an end face of the wiring substrate 11 and connected to the wiring pattern 13 through a blind via-hole wiring 17.
Since the semiconductor device having the above-described package structure undergoes a burn-in-test for applying a temperature stress and/or an electric field stress after resin-sealing, the package structure is superior to the flip-chip mounting without resin sealing.
In order to form the resin-sealed layer 16 shown in FIGS. 3 and 4, for example, liquid resin is supplied from a nozzle of a resin supplier onto the substrate 11, and caused to flow into between the chip and substrate by the surface tension and capillarity of the resin, and then hardened. Thus, the adhesion of the resin-sealed layer 16 and wiring substrate 11 or semiconductor chip 10 becomes poor, the reliability of the resin-sealing lowers, the operability and productivity deteriorate, and the production costs increase.
An example of an improvement of the above single-sided resin-sealed package structure and a method for manufacturing the same, are proposed in, for example, Jpn. Pat. Appln. (KOKAI) Publications Nos. 6-204272 and 1-191457.
Jpn. Pat. Appln. (KOKAI) Publications No. 6-204272 discloses a method for manufacturing a semiconductor device wherein an air vent is formed in a wiring substrate (circuit board), liquid resin is supplied to a gap between a flip chip and the substrate from two directions of the chip and caused to flow into between the chip and substrate by the surface tension and capillarity of the resin, and then hardened. According to this method, the air vent prevents bubbles from remaining in the resin between the chip and substrate.
Jpn. Pat. Appln. (KOKAI) Publication No. 1-191457 teaches a semiconductor device in which a through hole is formed in a flip-chip mounting portion of a wiring substrate (circuit board), and sealing resin is supplied to a gap between a flip chip and the substrate using the through hole as a fluid gate of the sealing resin. However, in this semiconductor device, too, the adhesion of a resin-sealed layer and the wiring substrate or semiconductor chip still remains inadequate, and the reliability of the resin-sealed layer is low.
The prior art semiconductor device having a single-sided resin-sealed package structure and the method for manufacturing the same, has a problem in which the adhesion of the resin-sealed layer and the wiring substrate or semiconductor chip is not necessarily adequate and thus the reliability of the resin-sealed layer is low.